Multi-layer printed circuit boards (PCBs) are constructed by laminating alternating layers of copper and insulating dielectric material. The number of layers can vary from 2 layers up to 30+ layers for complex high-speed designs. Some common layer counts are 4, 6, and 8 layer boards. The layer stackup, or sequence of copper and dielectric layers, must be carefully engineered to provide proper signal routing, power distribution, and impedance control. This article will examine typical stackups for 4, 6, and 8 layer PCBs.

Stackup Guidelines

There are several key guidelines to follow when designing the layer stackup:

• Place ground layers close to signal layers to provide return paths and shielding
• Use thicker copper weights for power distribution layers to handle current flow
• Maintain symmetry by balancing the number of copper layers on each side of the board’s center
• Alternate signal and plane layer pairs to control impedance
• Separate analog and digital sections to prevent noise coupling

4 Layer Stackup

A basic 4 layer board will have a signal-plane-signal-plane layer stackup. The 2 internal planes are used for power distribution and provide a continuous reference plane for the external signal layers.

Here is an example 4 layer stackup:

• Layer 1 – Top Signal Layer
• Layer 2 – Ground Plane
• Layer 3 – Power Plane
• Layer 4 – Bottom Signal Layer

The top and bottom signal layers are used for component placement and tracing, while the internal ground and power planes provide shielding and distribute power across the PCB.

The layer 2 ground plane isolates the sensitive top layer signals from the noise of the power plane below. Layer 4 signals also benefit from isolation from the power plane by the ground plane. The continuous ground plane is important for controlling impedance and providing return paths for signals.

For mixed signal designs, the top or bottom layer adjacent to the ground plane can be used for analog signals. This isolates the analog signals from the switching noise of the digital section on the opposite outer layer.

For high speed designs, the top and bottom layers would be used for high speed signals requiring tight impedance control. Matching trace geometries and ground plane clearance is straightforward with the signal layers adjacent to the ground plane. Vias transitioning through the power plane to the ground plane can provide low inductance return paths.

6 Layer Stackup

A 6 layer stackup adds additional routing layers and enables better separation of signal types. Here is a typical 6 layer arrangement:

• Layer 1 – Top Signal Layer
• Layer 2 – Ground Plane 1
• Layer 3 – Power Plane 1
• Layer 4 – Power Plane 2
• Layer 5 – Ground Plane 2
• Layer 6 – Bottom Signal Layer

The pair of internal ground planes provide shielding between the top digital signals and bottom analog/RF signals. This allows signals with greater noise sensitivity to be isolated from fast switching digital signals.

The dual power planes can be used to assign separate supplies to digital and analog sections, further improving isolation. Splitting the power distribution also reduces AC impedance compared to a single solid power plane.

On the outer signal layers, maintaining symmetry with a ground plane adjacent to each signal layer provides solid impedance control and continuous return paths. The dual ground planes effectively increase the target impedance, allowing wider trace geometry with less sensitivity to manufacturing tolerances.

8 Layer Stackup

With 8 layers, additional signal routing layers can be added between the ground planes:

• Layer 1 – Top Signal Layer
• Layer 2 – Ground Plane 1
• Layer 3 – Signal Layer 2
• Layer 4 – Power Plane 1
• Layer 5 – Power Plane 2
• Layer 6 – Signal Layer 3
• Layer 7 – Ground Plane 2
• Layer 8 – Bottom Signal Layer

This stackup keeps key high speed or noise sensitive signals on the outer layers. The dual ground planes adjacent to layers 1, 3, 6, and 8 provide excellent shielding from power plane noise. The high density signal layers in the center of the stackup are useful for routing low speed signals.

The dual power planes allow separation of digital and analog supplies or splitting higher current supplies. The additional signal layers in the center of the stackup also help maximize routing density by enabling more x and y routing midspan between outer layers. For designs with numerous layer transitions, the impedance consistency of this 8 layer stackup facilitates optimal layer transition design and via placement.

Layer Function Summary

In summary, here are the typical layer functions for 4, 6, and 8 layer designs:

4 Layers

• Layer 1 – Top signals
• Layer 2 – Ground plane
• Layer 3 – Power plane
• Layer 4 – Bottom signals

6 Layers

• Layer 1 – Top signals
• Layer 2 – Ground plane 1
• Layer 3 – Power plane 1
• Layer 4 – Power plane 2
• Layer 5 – Ground plane 2
• Layer 6 – Bottom signals

8 Layers

• Layer 1 – Top signals
• Layer 2 – Ground plane 1
• Layer 3 – Mid signals
• Layer 4 – Power plane 1
• Layer 5 – Power plane 2
• Layer 6 – Mid signals
• Layer 7 – Ground plane 2
• Layer 8 – Bottom signals

Signal Integrity Considerations

Properly engineering the layer stackup is critical for ensuring good signal integrity. Some key considerations include:

Reference Planes – Adjacent ground or power planes provide continuous return paths and impedance control. Vias transitioning between layers should avoid passing through active power planes.

Symmetry – The stackup should be symmetrical about the center axis to avoid imbalances leading to coupling or resonance. Equal copper weights should be maintained on each symmetrically mirrored signal-reference plane pair.

Decoupling – Good decoupling distribution using multiple capacitor values is essential. Decoupling caps should be placed close to IC devices with low inductance vias tying directly to the ground/power planes.

Separation – Sensitive analog or RF signals require greater isolation from noisy digital signals and should be placed on outer layers adjacent to ground planes.

Transitions – Layer transitions and vias should be carefully planned to minimize discontinuities and match lengths. Avoiding stubs, backdrilling, and backplane connections are other considerations.

Materials – Consistent dielectric materials should be used, especially when traces transition between layers. Some boards may require special microwave dielectrics for very high speed or RF layers.

Summary

In summary, 4, 6 and 8 layer designs utilize similar stackup strategies focused on symmetry, isolation, and ensuring robust return paths for signals. Outer layers adjacent to ground planes are ideal for high speed signals or sensitive analog signals. Power planes are best suited to the center of the stackup to isolate them using surrounding ground planes. Following basic stackup guidelines and planning layer transitions will help ensure the multilayer board provides clean signals with controlled impedance.

Frequently Asked Questions

Q: What is the main purpose of a ground plane?

A: Ground planes serve several key functions. They provide controlled impedance reference planes for traces on adjacent signal layers. Ground planes isolate signals from the noise of adjacent power planes. Large area ground planes also function as shields to limit EMI/RFI emissions from the board. The continuous copper plane offers a low inductance path to ground and can act as a heat sink.

Q: Should power and ground plane weights be different?

A: In most designs, the power and ground planes use similar thickness copper weights. However, for boards with higher current power distribution requirements, a heavier copper weight may be used on the power layer. Typical weights are 1 oz (35 um) for signal layers and ground planes, with 2 oz (70 um) or 3 oz (105 um) on power planes with higher current demands.

Q: What is the benefit of a split power plane?

A: Split power planes allow separation of noisy and quiet supplies. For example, a digital power plane and a clean analog supply plane can be isolated. Split planes also reduce the parallel plate resonance, improving voltage regulation and decoupling across the board area. The dual planes increase equivalent surface area, reducing AC impedance.

Q: How can layer transitions affect signal integrity?

A: Layer transitions and vias can introduce discontinuities that disrupt signal integrity if not properly managed. Avoiding abrupt stubs, maintaining return path continuity, controlling impedance mismatches, and minimizing length differences are key considerations when planning layer transitions. Using blind/buried vias or backdrilling techniques can help manage the transition.

Q: How many routing layers are typically needed?

A: The required routing layer count depends on board density and complexity. A minimum of two layers (top/bottom) are needed. 4-6 layers can route most simple digital boards. High complexity boards with 100,000+ traces and fine lines/spaces may require 10+ routing layers. High pin count BGAs and minimizing stub length also drive layer requirements.