Introduction

Immersion gold plating is a critical process in the printed circuit board (PCB) manufacturing industry. It provides a thin layer of gold over the copper traces on a PCB to protect them from oxidation and improve solderability. As PCBs become more complex with higher density interconnects, the immersion gold process must also advance to meet demanding reliability requirements. This article will examine the benefits of using a high-definition imaging (HDI) third-order process with 6 layers of immersion gold plating.

Benefits of HDI PCBs

HDI (High Density Interconnect) PCBs provide the following advantages compared to conventional PCBs:

Higher interconnect density

• Tighter trace/space allows more signals to be routed in the same area
• More effectively utilizes surface real estate on the PCB

Enablement of microvias

• Microvias (≤0.15mm diameter) connect layers together without using space for through-hole vias
• Provides vertical interconnection in a very compact form factor

More routing channels

• Additional buildup dielectric/copper layer pairs enable more signal routing resources
• Complex designs can be broken into segments on different layer pairs

Improved signal integrity

• Shorter trace lengths due to higher component densities
• Thinner dielectric buildup layers reduce parasitics

Miniaturization

• Overall footprint of the PCB assembly can be reduced
• High density packing of components in a small form factor

Reduced layer count

• A 6 layer HDI PCB can potentially replace a 12 layer conventional PCB
• Lower layer counts result in reduced cost

In summary, HDI technology enables smaller, faster, and more functional PCB designs critical for today’s space-constrained electronics.

HDI Stackup Construction

A third-order HDI buildup typically contains three main sections in the layer stackup – the core layers, buildup layers, and outer layers:

Core layers

• Thicker dielectric material forms the core of the PCB
• May include power and ground planes
• Often uses lower resin content prepreg

Buildup layers

• Thinner dielectric coatings, e.g. 25-50μm in thickness
• Additional copper layers used for signal routing
• Microvias provide vertical connections through buildup layers

Outer layers

• Final layer pairs on the top and bottom surfaces
• Lands, traces, and pads for component mounting
• Solder mask layer coats the outer layers

Here is an illustration of a third-order 6 layer HDI stackup:Copy code

Top Solder Mask Top Copper (Outer Layer 4) Buildup Dielectric 3 Copper (Buildup Layer 3) Buildup Dielectric 2 Copper (Buildup Layer 2) Buildup Dielectric 1 Copper (Buildup Layer 1) Core Dielectric Copper (Core Layer 2) Core Dielectric Copper (Core Layer 1) Bottom Solder Mask

The core layers provide a sturdy foundation, while the buildup layers route signals horizontally. Vias connect the layers together vertically. The stackup arrangement is optimized for HDI’s high interconnect density.

HDI Design Rules

To achieve the full benefits of HDI PCBs, the design must adhere to constraints on trace/space, via diameters, and anti-pad sizes. Typical HDI design rules include:

• Minimum trace/space width: 5/5 mil (0.127mm)
• Minimum microvia diameter: 8 mil (0.20mm)
• Minimum anti-pad diameter: 11 mil (0.279mm)

The tight tolerances demand precise imaging capability during PCB fabrication. Meeting the stringent requirements also allows routing traces very efficiently. This enables the high component densities and miniaturization that are trademarks of HDI technology.

HDI Manufacturing Process Overview

Fabricating HDI PCBs requires specialized manufacturing techniques:

Metallization

• Sputter deposition coats dielectric layers with copper
• Provides thin metal layers for finer features

Photolithography

• Laser direct imaging (LDI) exposes high resolution patterns
• Capable of 5 mil lines/spaces or finer

Plating

• Copper electroplating builds up trace thickness
• Precise control of plating distribution

Microvia Formation

• Laser ablation drills small via holes
• Accurately produces 8 mil diameter or less

Outer Layer Imaging

• LDI defines ultra-fine SMD pads/lands
• Tight tolerances on registration accuracy

Final Plating

• Immersion tin or immersion silver coats outer pads
• Immersion gold provides oxidation protection

The combination of HDI design practices and advanced manufacturing techniques allows these cutting edge PCBs to be produced.

Why Use Immersion Gold Plating?

Immersion gold is a commonly used surface finish for printed circuit boards, providing the following benefits:

• Excellent oxidation resistance – The gold layer prevents copper oxidation which can interfere with soldering
• High solderability – The gold readily dissolves into solder, creating a strong solder joint
• Wear resistance – Gold does not corrode easily, so connectors can be reliably inserted thousands of times without wearing the surface
• Wire bondability – Gold provides a ideal surface for wire bonding in semiconductor packaging
• Conductivity – Gold is highly conductive, enhancing electrical performance

For these reasons, immersion gold is an ideal finish for HDI boards where reliability and performance are critical. The gold preserves the integrity of PCB traces and pads despite the boards’ density.

Immersion Gold Process Overview

Immersion gold plating involves submerging the PCB in a series of chemical baths:

1. Etch – Removes oxide and contamination from copper surfaces
2. Activate – Coats the copper with a layer of palladium catalyst
3. Accelerate – Deposits gold over the palladium layer
4. Displacement plate – Further deposition of gold displaces the palladium
5. Reduce – A final bath enhances gold purity

The process is based on chemical reactions without using external electrical current. It provides a uniform, porous gold coating typically between 3-8 microinches (0.08-0.2 microns) thick. The pores help the solder joint formation.

Why Use a 6 Layer Immersion Gold Process?

While a single immersion gold layer would protect traces/pads, reliability can be improved by plating additional layers. The benefits of a 6 layer stackup include:

Increased gold thickness

• Total thickness in the 18-40 microinch (0.5-1 micron) range
• Withstands higher insertion pressure without brassing

Redundancy

• Multiple protective layers provide backup if a layer is damaged
• Avoids exposing the base copper if the gold is worn away

Pore optimization

• Each layer has its own porosity to assist solder flow
• The stack creates tunnels for enhanced joint formation

Repeatability

• Consistent results by plating in several cycles
• Minimizes process variability

The layered construction provides more robust protection on HDI designs where traces are fragile. This improves the boards’ durability despite high densities.

Potential Issues to Mitigate

While immersion gold and HDI offer significant benefits, potential risks should be managed:

Gold embrittlement

• Thick gold layers could make copper brittle
• Keep individual layer thickness low

Thermal stress

• CTE mismatch between copper and thick gold can induce warping or cracking
• Optimize plating parameters and board layout

Plating folds

• Gold layers may fold over onto glassweave at high thickness
• Use buildup dielectric without glass for maximum layers

Via hole challenges

• Completely plating small microvias is difficult
• May lead to uneven plating distribution

Cost

• Additional gold layers increase cost
• Weigh value of enhancement vs. price impact

Proper plating bath maintenance, HDI materials selection, and design techniques can help avoid these potential pitfalls.

Summary

Third-order, 6 layer HDI PCBs with immersion gold provide the interconnect capability and reliability required by many modern electronic systems. The combination enables:

• High density component mounting and routing
• Thin layers with fine features and microvias
• Performance enhancements from short traces
• Durable gold protection of copper traces

While requiring tight design tolerances and advanced fabrication processes, the resulting PCBs can meet the needs of space and performance constrained technologies. The layered immersion gold approach improves reliability despite the high densities inherent to HDI.

Frequently Asked Questions

What is the benefit of a 6 layer immersion gold process versus a single layer?

The main benefits are increased overall gold thickness for durability, redundancy so that damage to one layer does not expose the copper, optimized pore structures to enhance soldering, and repeatability by plating in multiple cycles.

How thick can the gold layers be without causing embrittlement issues?

It is generally recommended to keep individual immersion gold layers under around 1 micron thickness to avoid potential embrittlement of the underlying copper. The stacking of multiple layers allows adding durability without making any one layer too thick.

What is the minimum microvia diameter that can be reliably plated with 6 layers of immersion gold?

The lower limit for HDI microvias is around 8 mils (0.2mm). Completely plating a stacked gold process into vias smaller than that becomes challenging and can result in uneven plating distribution.

How many insertion cycles can connectors withstand with a 6 layer immersion gold finish?

Typical connector durability ratings are in the tens of thousands of insertion cycles. With the thicker gold finish, performance over 100,000 cycles can potentially be achieved. This enhances reliability in high mating cycle applications.

How much does a 6 layer immersion gold process increase cost versus standard 1 layer?

In general, each additional layer of immersion gold adds between 5-10% to the PCB fabrication cost. The enhanced reliability is often worth the additional expense, but budget impact should be evaluated.